Synapticad WaveFormer Pro

WaveFormer Pro enables to determine automatically critical paths, verify timing margins, adjust for reconvergent fanout effects, and perform \"what if\" analysis to determine optimum clock speed. WaveFormer Pro also allows to specify and analyze system timing and perform Boolean level simulation without schematics or simulation models. Digital stimuli for Verilog, VHDL, SPICE or gate-level simulators can be generated from the completed timing diagram. WaveFormer Pro has the ability to import and annotate simulation and logic analyzer data, for publication quality design documentation.

Back to...


Other products at CERN by Synapticad

You are here